FPGA Developer

  1. Import the Icicle Kit reference design into Libero SoC Design Suite.
  2. If you wish to change the MSS Fabric Interface:
    • Launch the MSS Configurator.
    • Add/edit the peripherals.
    • Change the pin assignment of the MSS peripherals.
    • Configure the FIC.
    • Configure the clocks.
    • Change the MSSIO configuration.
    • Configure DDR/L2 memory partition.
    • Generate the MSS configuration as a MSS component file (cxz).
  3. Follow the Libero SoC design flow:
    • Import the MSS component.
    • Add custom HDL.
    • Add timing constaints.
    • Synthesize.
    • Place and Route.
    • Initialize eNVM client with HSS binary built with the configuration created in step 2.
  4. If you wish to decode the FIC address in the fabric, export the Libero memory map and hand over this information to the software developer to import into the embedded flow.
  5. Program and test the bitstream.

Reference Material

UG0758 User Guide PolarFire FPGA Design Flow Libero SoC

MSS configurator tool